Crossworks Blinky Project 2 - RCC and Systick

In the previous post, the STM32 development board was turning a LED on and off in response to a button press. Not very exciting but satisfying anyway. Next, I want to have a look at setting up the system oscillator and the systick timer…

In the last example, nothing was done to set up the oscillator or determine where the processor got its clock source from. There is a moderately complex set of clocking arrangements possible with the STM32. Three sources can be used for the System Clock (SYSCLK) - the High Speed Internal clock (HSI), the High Speed External clock (HSE) and the Phase Locked Loop clock (PLL). After a reset the device will naturally boot up using the HSI clock. This is an RC oscillator that runs at a nominal 8MHz. The accuracy is supposed to be about 1% and this may well be enough for many uses. It has the advantage of requiring no external components but its use limits the maximum available SYSCLK value to 64MHz. With an external crystal or resonator, the maximum possible system clock is 72MHz.

A fast SYSCLK is not an obviously good thing. Access to programs stored in flash requires wait states to be added if the value of SYSCLK is set too high. A prefetch buffer must be used when SYSCLK is greater than 24MHz.

Even without an external crystal or resonator, the PLL can be used to multiply the clock by an integer between 3 and 16.

However, before messing with the clock source, lets have a look at a way to generate fixed time intervals based on the clock so that we can see the effect of any change. Software timing loops are, of course, useless for this as they depend on things like the optimisation level set on the compiler.

The STM23, in common with the other CORTEX-M3 devices, can generate an internal clock called SysTick. This can then be used to trigger interrupts which will form the heartbeat of the system.

The Cortex System Timer, SysTick, is generated by a divider, of ration 1/8, fed from the AHB clock which is in turn derived from the SYSCLK via a divider. Left without any other configuration, the AHB divider will be set to one so the SysTick frequency will be SYSCLK/8. With the default 8MHz HSI clock running, SysTick should be 1MHz. And yes, this is all a bit tricky to keep track of.

Now, SysTick can trigger an interrupt so we need to enable that interrupt and provide an interrupt handler to do something on each tick. An interrupt handler looks like this:

Notice that the handler is a simple void function with no arguments. Crossworks pre-defines all the handlers with a ‘weak’ attribute, allowing them to be simply replaced by your code when the linker works its magic. This simple handler maintains a global variable, tickCount, that can be used for accurate timing elsewhere in the program.

Now we have to turn on the interrupt and make sure that SysTick is generated at an appropriate frequency. The code required can be placed in a function called SystemInit() which will be one of the first things called in main():

Turning on the counter is not enough to enable the interrupt. That requires a separate action. If all that is configured correctly, the result should be that the LED on my board will be turned on and off with a frequency of 500Hz - on for 1ms, off for 1ms. According to my trusty oscilloscope, the actual frequency is 499.4 Hz. Pretty good since, with 1% accuracy, I might expect it to be anywhere between 495Hz and 505Hz.

At this point, the clock arrangement is:

Which is pretty simple and gives us a nice, working system right out of the box. Unfortunately, it is running at only 8MHz and the Cortex can do much better than that. Another look at the clock tree in the manual gives the possibility of putting the HSI through a Phase Locked Loop multiplier. For some reason, the HSI clock has to pass through a /2 divider first but, suppose we want a 20MHz clock. That would mean 8MHz first divided by 2 and then multiplied by 5:

Note that the input to sysTick would be 2.5MHz so that the reload count needed to restore the 1ms SysTick would be 2500.

The first job is to tell the PLL input selector to use the HSI input. Then, the PLL multiplier must be set to 5 and we have to wait for the PLL to settle. Finally, we can select the PLL output as the source for SYSCLK.

Here is the new SystemInit() code:

There are several more clock systems and subsystems. The Reference Manual tells you all about them but is short of code on how to set it all up. Keep it all simple if possible. Next time, I will set the clock as high as it will go and look at the effect on the code and performance.