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Revised schematics and pin functions PDF Print
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Written by Pete Harrison   
Sunday, 16 September 2007
After a bit more thought, there is now a new set of pin assignments for the Primus micromouse, along with a corresponding schematic.

The probelm with Primus was that it is not possible to generate two independant pulse trains form the PWM generators. All the PWM channels have to share a common time base.

The Output Compare peripherals on the dsPIC30F4011 can generate up to two independant pulse trains in hardware but one of the time bases must come from Timer 2 which is needed for counting steps sent to the motors. One of the fundamental design decisions on Primus is to drive the two steppers at high speeds without any interrupt service routine soaking up processor cycles.

It seems that one motor will have to be driven from an OC channel and the other from a PWM channel.

The PWM channel is fairly straightforward, we just set the duty cycle to something appropriate, like 50%, and change the frame rate to get a square wave at some arbitrary frequency. steps are always made on the leading edge of the pulse so the actual duty cycle is not too important as long as the pulse satisfies the minimum leng specified for the driver chip. This is 2us so we have plenty of scope.

For the other motor, one of the OC channels (OC1) will take its time base from the currnetly unused Timer 3. OC1 will be configured to generate short pulses at the start of each cycle. Again, only the leading edge is significant so we just need to make sure that the pulses are at least 2us long.

This is not as elegant as I had hoped. the limitations of a 40 pin device start to bite here. Other devices in the family with more pins (but surface mount) give access to a couple more counter inputs and would make the problem a lot more simple. Just to add an extra layer of complication, I amtrying to arrange the pin functions so that conversion to a DC motor driven mouse will be easier. It might have turned out simpler if I had not bothered!

The previously published schematics and pin functions have been updated and are available here:

Mainboard Schematics

Pin function list 

 

Last Updated ( Sunday, 16 September 2007 )
 
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